Make chip design and tapeout open, affordable, and accessible.
From ideas to silicon, ChipHarbor reduces the cost, process friction, and uncertainty that keep more builders from fabricating real chips.
About ChipHarbor
Open silicon needs a reliable harbor.
ChipHarbor turns ECOS55 tapeout access, template guidance, signoff review, manufacturing WIP, and delivery services into a clear online product workflow.
Be the harbor for the open silicon era.
We imagine a world where every serious chip idea can set sail through shared infrastructure, trusted engineering support, and transparent delivery.
Platform Role
Designed for builders who already have ideas and need a path to silicon.
The platform serves hobbyists, students, research labs, and commercial prototype teams with a small set of understandable objects: templates, shuttles, submissions, orders, signoff, and Tapeout Voyage WIP.
Shared tapeout economics
MPW and MPC flows reuse manufacturing, IO, package, board, and test resources so tiny experiments and teaching projects can fit a realistic budget.
Template-aware submission
Pre-validated templates and file requirements make it easier to know whether to prepare GDS, DEF, netlist, or supporting assets before signoff.
Trackable manufacturing
Orders move through signoff, payment, tapeout, wafer fabrication, packaging, board assembly, and shipping with visible status checkpoints.
Values
Principles for an approachable chip platform.
The values below translate the platform brief into product behavior: clear choices, open infrastructure, and engineering accountability.
Open by Default
Grow open PDK, IP, SoC, EDA, and knowledge assets as reusable public infrastructure.
Accessible Silicon
Make tapeout understandable and affordable for more people, not only established chip teams.
Builders First
Prioritize the next action a user needs to take: prepare files, submit, order, pay, or track.
Engineering Trust
Use explicit checks, requirements, reports, and WIP milestones instead of vague process promises.
Shared Voyage
Treat shuttles as shared journeys where cost and progress are visible to participating builders.
Learn, Tape Out, Iterate
Support education and experimentation so more ideas become measured, improved silicon.
Next Step
Choose a template, then board a shuttle.
Start with Ark for a private die, or pick an MPC template when a shared chip and lower entry cost fit the project.