Shuttles

Tapeout batches with visible deadlines, chips, and voyage status.

Mock shuttle data shows the model users need: open seats, planned departures, historical chips, and active WIP from design submission through delivery.

Open and Planned

Board the next ECOS55 run.

Create Order
ShuttleStateTemplatesSubmit deadlineTypical deliveryMock capacity
ECOS55-2610
Gate A1
OpenArk, Freighter, Cruise, OSOC2026-09-15~6 months after tape-in42 MPC slots, 6 MPW dies
ECOS55-2702
Gate B4
PlannedFreighter, Cruise, OSOC2027-01-28~6 months after tape-in64 MPC slots
ECOS55-2706
Gate C7
PlannedArk, Freighter2027-05-22~6 months after tape-in36 MPC slots, 8 MPW dies
Active Shuttle WIP

ECOS55-2604 is in wafer fabrication.

This mock active shuttle exposes the Tapeout Voyage states as a manufacturing timeline. Wafer Fabrication can expand to mask-layer progress in the production product.

Design SubmittedActual date 2026-04-12
Completed
GDS ReadyActual date 2026-04-24
Completed
TapeOutActual date 2026-05-01
Completed
JDV checkActual date 2026-05-07
Completed
Wafer FabricationActual date 2026-05-25, M12 of 28 layers mocked
In progress
Wafer OutPlanned date 2026-08-18
Pending
PackagingPlanned date 2026-09-20
Pending
Customer ShippingPlanned date 2026-10-22
Pending
Historical Gallery

Mock chips and user designs from previous voyages.

The gallery uses generated chip-style blocks and realistic metadata, not protected external imagery.