Multi Project Wafer
A user owns a complete die inside the shuttle. Ark supports arbitrary designs that meet size and process rules.
Templates define your sharing mode, design area, interface expectations, required files, optional services, and deliverables.
$50 USD / ¥330 CNY
Mocked entry price for a 0.01 mm² Freighter design before optional services and eligibility discounts.
A user owns a complete die inside the shuttle. Ark supports arbitrary designs that meet size and process rules.
Multiple user designs share one chip, peripheral IP, IO, package, board, and test infrastructure to lower cost.
The MPW view highlights a whole die region inside a reticle. The MPC view shows user regions moving inside a shared chip core with a pad ring.
Mocked specifications preserve the platform brief and keep uncertain details clearly estimated.
Dedicated die with no shared top template. Best for complete chips and custom infrastructure.
Flexible small-area lane with 73 programmable IOs and shared periphery.
RISC-V-oriented lane with retroSoC IP, 36 programmable IOs, SDK, and bring-up support.
One Student One Chip special path using the official SoC environment and course checklist.