Make tapeout accessible
We make chip design and tapeout open, affordable, and accessible, from ideas to silicon.
ChipHarbor lowers the threshold for chip design and tapeout through ECOS55 open infrastructure, pre-verified templates, shared shuttle economics, online signoff, and traceable delivery.
We make chip design and tapeout open, affordable, and accessible, from ideas to silicon.
To be the harbor for the open silicon era, where every chip idea can set sail.
Users select a template and shuttle, submit design resources, pass signoff, pay, and track manufacturing WIP through delivery.
The values below come from the platform brief and are translated into product behavior for this prototype.
Invest in reusable PDK, IP, SoC, EDA, templates, and knowledge that compound for the ecosystem.
Bring entry costs down with shared shuttles, tiny MPC regions, and online purchase-style flow.
Keep the workflow direct: clear requirements, practical defaults, and no mystery around the next step.
Make signoff, manufacturing states, and delivery evidence explicit rather than hidden in email threads.
Use MPW and MPC economics so many builders can share infrastructure while preserving clear boundaries.
Support students, labs, and independent teams as they move from first prototype to real silicon feedback.
why this exists
shared resourcespre-verified templatesECOS ecosystemlocal EDA compatibleTapeout Voyage