Dashboard
Submissions, orders, and voyage status in one place.
This mocked logged-in state shows the core first-stage platform workflow: create a design submission, bind it to an order, pass signoff, pay, and track Tapeout Voyage WIP.
My Designs
| Submission | Template | Files | Signoff | Updated |
|---|---|---|---|---|
| SUB-2610-018 vector-spark.gds |
Freighter MPC 0.04 mm², 73 IO template |
DEF, Verilog netlist, SDC | Passed | 2026-06-08 |
| SUB-2610-022 tiny-rv-core.def |
Cruise MPC 0.16 mm², retroSoC path |
DEF, Verilog netlist | Pending | 2026-06-09 |
| SUB-DRAFT-004 serdes-monitor.gds |
Ark MPW 1.2 mm² independent die |
GDS | Unsubmitted | 2026-06-10 |
My Orders
| Order | Bound Submission | Signoff | Payment | Tapeout Voyage |
|---|---|---|---|---|
| ORD-2610-011 ECOS55-2610 |
SUB-2610-018 | Passed | Paid | GDS Ready |
| ORD-2610-014 ECOS55-2610 |
SUB-2610-022 | Pending | Locked | Awaiting Signoff |
| ORD-2606-007 ECOS55-2606 |
SUB-2606-009 | Passed | Paid | Wafer Start |
Tapeout Voyage
ORD-2606-007 WIP detail
Design SubmittedActual date 2026-04-12
GDS ReadyActual date 2026-04-26
TapeOutActual date 2026-05-08
JDV checkActual date 2026-05-18
Wafer StartActual date 2026-06-02. Mask layer progress 08/32.
Wafer FabricationPlanned date 2026-07-05
PackagingPlanned date 2026-09-28
Customer ShippingPlanned date 2026-11-20