Lower manufacturing cost
MPW and MPC sharing reuse manufacturing, IO, package, board, and test resources so small projects can participate.
About ChipHarbor
A harbor for the open silicon era.
ChipHarbor lowers the threshold for chip design and tapeout by combining ECOS55 templates, shared manufacturing modes, online signoff, order management, and visible delivery WIP.
Mission
Make chip design and tapeout open, affordable, and accessible.
From ideas to silicon, the platform gives independent builders, students, research groups, and teams a guided way to reach real ECOS55 chips.
The product focuses first on online ordering, Submission management, Signoff checks, manufacturing WIP tracking, and delivery management. Future platform work can connect cloud-native chip design tools to the same flow.
Vision
To be the harbor for the open silicon era, where every chip idea can set sail.
Lower engineering complexity
Pre-verified templates and online signoff turn a scattered backend process into a legible sequence.
Traceable production
Tapeout Voyage WIP gives users a single view across tapeout, fabrication, packaging, board assembly, and shipping.
Values
Principles for a shared chip voyage.
Open by Default
Support open PDKs, open IP, open SoCs, open EDA, and reusable learning resources.
Accessible Silicon
Make real fabrication reachable for small teams, classrooms, labs, and independent projects.
Builders First
Design product flows around the next concrete step: submit, sign off, order, pay, track, receive.
Engineering Trust
Prefer clear constraints, verified templates, signoff artifacts, and accountable WIP status.
Shared Voyage
Use shared shuttle and chip infrastructure to reduce cost while keeping each user journey visible.
Learn, Tape Out, Iterate
Connect education, open contribution, manufacturing, bring-up, and the next design revision.
Next
Choose a route into silicon.
Compare templates, check shuttle timing, or start a mocked dashboard submission.